Background Information

In the past, research had been conducted to make all-optical packet switches and  all-optical packet networks a reality. However, packet contention is still a major issue in all-optical packet switching. To solve the problem, two contention-resolution methods have been intensively studied. The first is the wavelength contention-resolution scheme. The second is the time contention-resolution scheme. . 

Fig. 1 shows a promising implementation of all-optical shared-buffer packet switch. The switch contains a number of feedback FDLs that are shared among all input ports. When there is output-port contention, packets can be deflected to any of the available FDLs for temporary storage, in the hope that when they come out from the FDL circulation the desired output ports will be available. As FDLs are bulky, only limited amount of such memory is recommended when building a switch. Hence, it has become an important issue on how to make use of the FDL resource efficiently. 

Scheduling algorithms for the shared-FDL optical switch have been studied extensively. These algorithms, however, have each placed constraints upon the traffic that they can route, from fixing the packet lengths, to requiring packets to be aligned before switching, making them impractical in a real-world environment.

More efficient switching schemes and scheduling algorithms for routing variable-length, unaligned or partially aligned packets are therefore needed in order for practical implementation. This is also the main objective of  this research project.

Figure 1.   A single-stage shared-buffer all-optical switch

Scope Of Research

This research project seeks to develop generic scheduling algorithms for all-optical shared-buffer (shared-FDL) timeslot/packet/burst switches. The algorithms will be able to schedule the departure order of data units for the following:

(a)                 circuit-based optical timeslot switches (OTS),

(b)                 fixed-length optical packet switches     (OPS), and

(c)                 variable-length optical burst switches   (OBS)

Also, this project seeks to do the following:

(a)       to develop high-performance scheduling algorithms for all-optical fixed- and   

                 variable-length packet switches.

(b)       to generalize the algorithms to various traffic conditions in all-optical   

           switches/networks.

(c)       to construct analytical models and conduct simulation to analyse the  

           performance of shared-buffer switches in various all-optical networks.

Outcomes Of Research

In this project, a scheduling algorithm, called the variable-length packet FDL assignment (VAPFA) algorithm, for shared-FDL all-optical switches, has been proposed. The VAPFA algorithm is able to resolve the contention of variable-length packets, and perform the FDL buffer allocation/reservation for a delayed packet so that it can be scheduled to match with the desired output port in future time. As optical packets cannot be fragmented, in a valid FDL assignment of VAPFA, all slots that belong to the same packet must always pass though the same FDL path from the input to the output. The VAPFA algorithm was then used as a tool to evaluate the performances of different all-optical switching paradigms in the project. It was discovered that in an all-optical switching paradigm that allows variable-length packets, the performance is inferior to those that allow fixed-length packets. However, the assumption of variable-length packets is more realistic from the point of view of modeling Internet traffic.

In this project, a new model, called variable-length-packet fixed-length-slot switching (VPFS), has been proposed for all-optical networks. In a VPFS network, all switches adopt the same slot size but slot boundaries are not synchronized from one switch to another. When a packet of any length arrives at a switch, a slot or multiple consecutive slots must be assigned to carry that packet from the input to the destined output, with the condition that the chain of slots carrying the packet cannot be broken up and routed separately in the switch. Given a selected slot size, s, and the average length of packet, x, it has been shown in one of our papers that the expected arrival overhead of a packet due to asynchronous slot boundary is equal to s, thus the maximum throughput of the VPFS scheme is limited to x /( x +s). In this research, although a small slot size is preferable in order to maximize the throughput, the challenge of switching is a compromise. The switching and scheduling algorithms designed for fixed-length packet switching was then modified to handle the VPFS traffic, and simulation was also conducted to evaluate the performances of different all-optical switching paradigms, such as OPS, OBS, etc.   

A fast scheduling algorithm has been developed and it is able to calculate a scheduling assignment for an optical packet in 30ns with 8 parallel processors, yet the loss rate of the switch is kept around 10^-7 even at a high load of 0.9

An ultra-fast algorithm has also been developed and it can calculate the scheduling assignment for 32 optical packets within about 0.15us, yet with the same performance as that of the previous fast algorithm.

Conclusion

In this research project, the following goals have been achieved:

(1)       Two new models have been developed

           (a)    Slotted Model for All-Optical Variable-Length Packet Switching

           (b)    Partial Alignment Scheme: Theory and Solutio

(2)              Two new algorithms have been proposed

           (a)    Variable-length Packet FDL Assignment (VAPFA) Algorithm

           (b)    Fast Scheduling Algorithms for All-Optical Shared-Buffer Packet Switches

(3)              The following three IEEE international papers have been published

·         A Time-Slotted Model for All-Optical Variable-Length Packet Switching

        Without Packet Alignment,? Proceedings of IEEE AICMS'08,  pp. 234 - 239,    

        Kuala Lumpur,  May 2008

·         On All-Optical Slot Switching with Partial Alignment, Proceedings

 of  IEEE CCECE'08,  pp. 1429 - 1432,  Niagara Falls,  May 2008.

·         A Fast Scheduling Algorithm for All-Optical Shared-Buffer Packet

  Switches,?  Proceedings of IEEE CCECE'08,  pp. 1413 - 1416,

  Niagara Falls, May 2008.